Diode counter circuit



Feb. 13, 1951 A. s. HARRlS DIODE COUNTER CIRCUIT 2 Sheets-Sheet 1 Filed Dec. 1, 1945 INVENTOR ALBERT S. HARRIS ATTORNEY Feb. 13, 1951 A. s. HARRIS ,05

DIODE COUNTER CIRCUIT Filed Dec. 1, 1945 2 Sheets-Sheet 2 FIG.5

ALBERT S. HARRIS ATTORNEY Patented Feb. 13, 1951 U NIT ED STATES PATENT 0 FF 1 CE.

DIODE" COUNTER CIRCUIT Albert S. Harris, Fort Wayne; Ind, assignor, by

mesne: assignments, to; Earnsworth. Research Corporation, a corporation of Indiana Application December 1, 1945, Serial N0. 632,214

141 Claims. (01. ZSO -Z'Z) This invention relates generally to impulse responsive devices, and more particularly relates to an electric counter circuit arranged fortieveloping an output voltage which rises by nearly regular intervals, such as" developed in responseto: the radiations of radioactive materials or to cosmic radiation.

Conventional counter circuits develop an output voltage which increases insteps in response to the input pulses. However, the increments of the output voltage of prior counter circuits decrease prog'ressively which severely limits their field of application. It is conventional practice to utilize amplitude selection for operating subsequent circuits which may include a discharge tube. Thus the individual voltage increments become increasingly smaller, and triggering of the dischargedevice connected to the output of the counter circuit may occur either before or after the desired number of input pulses has occurred. Accordingly, stable operation is more difficult to realize with higher counting ratios, that is, where the number of input pulses is high compared to the number of output pulses per unit of time.

A prior counter circuit comprises two inverted parallel diodes. having their input connected to a charging condenser while the output of one oi the diodes is connected to a storage condenser. In this counter circuit the increments of the voltage developed across the storage condenser in response to input pulses decrease rapidly. It is, therefore, very desirable to provide electric counter circuits where the increments of the output voltage are more nearly uniform than in prior circuits. The last voltage increment of the circuit should have a large amplitude to permit a higher counting ratio with stability.

It is an object of the present invention, therefore, to provide an electric counter circuit which will develop an output voltage which increases with each input pulse by nearly uniform incremcnts.

A furtherob'iect of the invention is to provide 2 an electric countercircuit which permits a high counting ratiowherebythe frequency of the input pulses is high compared to the frequency of the output pulses.

In accordance with the present invention, there is provided an electric counter comprising an electric charging element and an electric storage element. Means are provided for developing spaced pulses and means for applyin the pulses to the electric elements for charging them in to the pulses are substantially equalized. Means are further provided for discharging the storage element when it has reached a predeterminedpm tential.

For a better understanding of the invention,

together with other and further objects thereof reference is made to the following description, taken in connection with the accompanying drawings, and its scope will be pointed out in: the appended claims.

In the accompanying drawings:

Fig. l is a circuit diagram of an electric countier circuit embodying the present invention;

Figs: 2 to 4" are equivalent circuitsof different portions of the electric counter of Fig.1 and are referred to in explaining the invention; and

Fig. 5 is a group of curves illustrating thevoltages appearing across several condensers forming part of the counter circuit of Fig. 1 during a period of time corresponding to the occurrence of two successive input pulses applied to the circuit oi the invention.

Referring now more particularly to Fig. 1 of the drawings, there is illustrated an electric counter circuit comprising three charging condensers l, 2" and 3 as well as three storage condensers 4, 5 and 6. Pulse" generator 1 is provided for developing spaced pulses of predetermined amplitude E. The output of pulse generator T is connected across resistor 8 for developing pulses of voltage E as indicated at 9. One: output ter-= minal of pulse generator I, is connected to ground as illustrated. The other output terminal of pulse generator I is connected to one terminal of charging condensers I, 2 and 3. densers 4, 5 and 6 have one terminal connected to ground and to pulse generator I.

Charging condensers I to 3 and storage condensers 4 to 6 are interconnected by pairs of unilaterally conducting devices such as high vacuum diodes I0, II, I2, I3, I4 and I5. Diode III has its anode connected to ground as shown and its cathode connected to the other terminal of charging condenser I. Diode II is arranged between charging condenser I and storage condenser 4. The anode of diode II is connected to the cathode of diode I0. Hence, it will be seen that charging condenser I is connected between pulse generator i and the junction point of the first pair of diodes I and II;..' Storage condenser 4 is connected between ground and the output of the first pair of diodes III and I I.

Similarly, charging condensers 2 and 3 are connected between one terminal of pulse generator I and the junction points of the second pair of diodes I2 and I3 and of the third pair of diodes I4 and I5, respectively. Storage condensers and 6 are connected between ground and the output of the second pair of diodes I2 and I3 and that of the third pair of diodes I4 and I5, respectively. It will be observed that diodes In to I5 are connected in series to form a unilateral conducting path.

- Counter circuit 35, illustrated to the left of dotted line It and including charging condenser I, storage condenser 4 and diodes I6 and II, is a conventional counter circuit. Circuit 3I arranged between dotted lines I6 and IT includes charging condenser 2, storage condenser 5 and diodes I2 and I3. Circuit 3I is identical with circuit 32 arranged between dotted lines I! and I8 and including charging condenser 3, storage condenser 6 and diodes l4 and I5. As will be explained more in detail hereinafter, circuit 32 illustrated between dotted lines I1 and I8 may be omitted if desired, or else a plurality of circuits such as 3I and 32 may be connected in series.

The output signal may be derived between conductor 2fl'and-ground,-conductor being connected to the last storage condenser 6. A gasjdiode 2I connected between output conductor 20 and ground is biased by a suitable source such, for example, as battery 22. Whenever the voltage across storage condenser 6 has reached a predetermined potential with respect to ground, storage condenser 6 is discharged through gas diode The counter circuit of the invention operates as follows. It may beassumed that initially charging condensers I to 3 and storage condensers 4 to 5 have nochargethereon; Upon the arrival of the first input pulse developed by generator 7, charging condensers I, 2 and 3 each receive a predetermined charge. At the same time current flows from charging condenser I tostorage condenser 4 through diode II, thus charging storagecondenser 4. Similarly, charging condenser 2 and storage condenser 5 are connected in series through diode I3, and charging condenser 3 and the last storage condenser 6 are connected through diode I5, thereby to charge storage condensers 5 and 6.

@At the end of the first pulse, charging condenser I is discharged through a current path including resistor 8 and. diode. I0. At the same Storage con- 4 time, that is after the'occurrence of the first pulse, the first storage condenser 4 and the second charging condenser 2 are connected in series through diode I2. Accordingly, current flows through diode I2 until condensers 2 and 4 are discharged. Similarly, charging condenser 3 and storage condenser 5 are discharged through diode I4. 7

It will be observed that the current flowing through diode I2 charges charging condenser 2 in a direction opposite to the direction it is charged by the current flow resulting from input pulse 9. Accordingly, the voltage developed across charging condenser 2 due to input pulse 9 will be reversed. The same applies to the voltage of charging condenser 3 which will also be reversed. The reversed voltage across charging condensers 2 and 3 will then be added to the charging voltage E upon the occurrence of the succeeding pulse.

Thus, it will be seen that the voltages across charging condenser 2 and storage condenser 4 as well as those across charging condenser 3 and storage condenser 5 experience two changes for each charging pulse. The first change takes place in one direction during the occurrence of the pulse, while the second change takes place. in the opposite direction when the condensers are discharged after the occurrence of the pulse.

For a better understanding of the operation of the counter circuit of the invention the voltage increments of the last storage condenser of the circuit will be considered quantitatively. In order to simplify the following calculations it will be assumed that circuit 32 has been omitted so,

At first the conventionalcounter circuit 30 will 7 be considered. Let it be assumed that the peak voltage of each pulse 9 equals E, while C1 and "C2, respectively, are the cap acitances of charging condenser I and storage condenser 4. e2 is'the voltage across storage condenser. 4 after a predetermined number of pulses, while Aiez, A262, A362, are the voltage increments of storage condenser 4 after the first pulse, the second pulse and so forth. Let it be assumed further that initially charging condenser I and storage condenser 4 are discharged. The first voltage increment of storage condenser 4 on the arrival of the first pulse is; V

. As explained hereinbefore, charging condenser I and storage condenser 4 are connected during. the occurrence of each pulse through diodeIIl After the occurrence of each pulse, charging con-j; denser I is discharged through resistor 8 and diode Ill. Upon the arrival of the second pulse, storage condenser 4 will be charged an additional voltage incrementz charging condenser I is discharged again and, upon th r v l oi he th P l e tora e 991 A382=[EEm(E E =[1-R- (1-R)R]ER 1-R) ER=S ER In the above equation C C C ri- 2 ri- 2 l+ 2 and ' The total voltage across storage condenser 4 --iafter n pulses is:

LY] D ca+ot It will be seen that nal again consists of positive pulses of peak volt age E. Let it be assumed that there is no charge on condensers I, 2, 4 and 5 before the occurrence of the first pulse.

The voltage increments of charging condenser 1, storage condenser 4, charging condenser 2 and storage condenser 5 during the occurrence of the nth pulse are designated Amer, An,1e2, A1L,13, Amie-i, respectively. C1, C2, C3 and 04 stand, respectively, for the capacitances of charging condenser I, storage condenser 4, charging conde'nser 2 and storage condenser 5. Accordingly, the voltages across the four condensers during the occurrence of the first pulse, where 12:1, are as-followsz' total voltage across storage condenser 4, charglng condenser 2 and storage condenser 5 after 1;

pulses is respectively 811,2, em and mi. The voltage increments of condensers 4, 2 and 5 during the pulse under consideration, that is the nth pulse, are Amez, Andes and An,2e4, respectively.

5 The voltage increments of storage condensers 4 and charging condenser 2, respectively, after the nth pulse under consideration are A ez and A'nfles. en,1 does not enter into the following formulae because the voltage across charging condenser I is always reduced to zero after each pulse. n-1,2, en 1,3 and en-1,4 are the voltages across condensers 4, 2 and 5, respectively, prior to the pulse under consideration, that is after the (11-1) pulse.

Referring now to Fig. 2, there is illustrated a portion of the circuit of Fig. 1 including charg ing condenser I, storage condenser 4 and diode II connected between condensers I and 4. Condensers I and 4 are connected in parallel'with resistor 8 across input voltage E. The following formula for the voltage increment of storage condenser 4 during the occurrence of the nth pulse may be obtained from Fig. 2.

The next two formulae may be obtained from an inspection of Fig. 3 illustrating charging condenser 2 and storage condenser 5 connected through diode I3 and arranged in parallel with resistor 8 across voltage source Er A i r=iE -nad vnin cause diode I2 is only conducting after the occurrence of a pulse when E is zero again. The following formulae may be obtained from the circuit of Fig. 4:

The voltages across storage condenser 4, charg ing condenser 2 and storage condenser 5 after 1;

pulses are as follows:

It can easily be shown that en,2=en,3. If this assumption is correct, the following equation holds:

,Hence, after the occurrence of .a pulse, the voltages across storage condenser 4 and charging C2, C3 and C4 or to the ratios of the capacitances,

the voltages across charging condensers I and 2 and storage condensers 4 and 5 may be calculated. Referring now to Fig. 5, there are illustrated four curves 25, 26, 2! and 28 illustrating the voltages across charging condenser I, storage condenser 4, charging condenser 2 and storage condenser 5, respectively, during and after the first two input pulses. In the curves of Fig. 5 the abscissa represents time, while the ordinate represents the voltage. It will be observed from the numeral values indicated in Fig. 5 in connection with the voltage increments and the total voltages across the four condensers that the four curves are not plotted to the same voltage scale. For the calculation of the curves illustrated in Fig. 5 the following assumptions have been made:

QLQ 070.

The following table gives a comparison of the voltage increments obtained across the last storage condenser'during ten consecutive input pulses of the conventional counter circuit 30 and of the counter circuit of the invention including circuits 30 and 3|. voltageincrements obtained across storage condenser 4, when condenser 4 is the last storage E=l volts =9 and C =10C condenser, as well as those across storage condenser 5. These voltage increments correspond, respectively, to A162, Azez and so forth, and to An,1e4. The table also lists the total voltage across storage condenser 4, assuming that this is the last storage condenser, and the total voltage em across storage condenser after n input pulses.

Voltage inl crements Number y 32 Total voltacross storgg ig of input 6 age across age con- Storage con:

pulses or cgndensegr 4 storage condenser denser 5: steps n 9 circuit 30 denser 4 73% i and i 10 10 10 V 2 9 l9 9. 9 19. 9 3' 8. 1 27. 1 9. 7 29. G '4. 7. 3 34. 4 9. 5 39. 1 5 6. 6 41. 0 9. 2 48. 3 I 6 a 5.9 we as 57.2 7 5. 3 52. 2 8. 5 65. 7 s 4.5 .57. o s. 1 73.8 p 9 4.3 61.3 7.8 81.6 v 10 a 3.9 65.2 7.4 89.0

An inspection'of the above table will show that the voltage increments An,1e4 across storage condenser 5 of the counter circuit of the invention, that is circuits 30 and 3 I, decrease much less than .those of the conventional counter circuit 30. vAn

equation of the voltage across storagecondenser 5 has not been developed. However, the conditions can easily be shown which are necessary to make the Voltage increments across storage condenser 5 more nearly equal. From an inspection of Fig. 1 it may be learned that if C2, the

capacitance of storage condenser t, were infinitely large compared to C3, the capacitance of chargcharging condenser 2 would become charged be- The table enumerates the and opposite 'to that across storage condenser 5-. Therefore, A e; would always be equal to' This follows from the above equation form la, where (enl,3+en1,4):0. In that case all voltage increments'across storage condenser 5 would be, equal.

However, the voltage increments could never increase because this would mean that storage condenser 4 would have to be charged to a volt age which is higher than that across storage condenser 5. This could not happen becausein that case current would flow from storage con: denser 4 to storage condenser 5 through diodes i2 and i3. Accordingly, the voltage increments may be made more nearly equal by choosing for C2, the capacitance of storage condenser 4, a very much larger value than for C3, the capacitance of charging condenser 2.

By adding another circuit such as circuit 32, the voltage increments across the last storage condenser, that is storage condenser 6, may be made still more nearly uniform, That this is so may easily be seen by the following consideration. After the occurrence of a pulse, the voltages across storage condenser 5 and charging condenser 3 are equal in magnitude and opposite in sign. The above table shows that the voltage increments Andes. across storage condenser 5 are very nearly uniform. Therefore, the voltage across charging condenser 3 will also increase be; tween pulses by nearly uniform increments Thus, the voltage increments across storage condenser 6 should be still more nearly uniform than those across storage condenser 5. I It should be noted that the peak voltage to which storage condensers 4', 5 and 6 may become charged are equal to E, 2E and 3E, respectively.

When the last storage condenser, that is con denser 6 in the circuit of Fig. 1, has reacheda predetermined voltage level with respect to ground, it is discharged through gas diode ,-2 which is biased by battery 22. At the same time storage condensers d and 5 are also discharged through high vacuum diodeslz to l5,'00nncted in series, and gas diode 2|. At the same time charging condensers 2 and 3 are also discharged through high vacuum diodes l3 to i5. Charging .condenser I is discharged after the occurrenceof each-pulse through diode l0. Accordingly, all condensers I to 3 and 4 to 6 are simultaneously discharged when charging condenser 6 has reached its predetermined voltage level.

Storage condenser 6 may be discharged by any suitable means, and it is to be understood-that gas diode 2| has been shown for purposes of illustration only.

While there has been described what is at present considered the preferred embodiment of the invention, it will be obvious to those skilled in the Ltd-charge said first charging capacitance element and said first storage capacitance element in se:

rice and to charge said second charging capacitance element and said second storage capacitance element in series substantially simultaneously with the occurrence of each of said pulses, unilaterally conducting means coupled to said second charging capacitance element and to said first storage capacitance element for discharging them after the occurrence of each of said pulses, means for discharging said first charging capacitance element after the occurrence of each of said pulses, and means for discharging said second storage capacitance element when it has reached a predetermined voltage. 2. An electric counter circuit comprising a first and a second char ing condenser. a first and a second stora e condenser, the capacitance of said first charging condenser divid d by the capacitance of said first storage cond nser being substantially equal to the ca acitance of said second charging condenser divided by the capac tance of said second storage condenser. the capacitance of said first storage condenser being large compared to the capacitance of said second charging condenser, means for developing spaced pu ses of predetermined amplit de, means for apnlving said pulses to said condensers to char e said first chargin condenser and said first stora e condenser in ser es and to charge said second charging condenser and said second stora e condenser in series substantially simultaneously with the occurrence of each of said pulses, uni aterally conducting means connected to said second charging cond nser and to said first storage condenser for discharging them after the occurrence of each of said pulses, means for discharging said first char ng condenser after the occurrence of each of said pulses, thereby to eoualize substantially the voltage increments applied successively to said second storage condenser. and means for discharging said second storage condenser when it has reached a predetermined vo ta e.

3. An electric counter circuit comprising a first and a second charging capacitance element, a first and a second storage capacitance element, means for develop ng spaced pulses, means for applying said pulses across said capacitance elements, unilaterally conducting means for connecting in series said first charging capacitance element and said first storage capacitance element and for connecting in series said second charging capacitance element and sa d second storage capacitance element substantially simultaneously with the occurrence of each of said' pulses, uni aterally conducting means for connecting in series said'second charging capacitance element'and said first storage capacitance elementrafter the occurrence of each of said pulses, unilaterally conducting means for d scharging said first charging capacitance element after the occurrence of each of said pulses, and means for discharging said second storage capacitance element when it has reached a predetermined voltage.

' 4; An electric counter circuit comprising a first and a second charging condenser, a first and a second storage condenser, a source for developing spaced pulses of predetermined amplitude connected between another source of fixed reference potential and one terminal of each of said charging'condensers, one terminal of each of said storage condensers being connected to said source of referencepotential, a first unilaterally conducting device connected between the other termi nals of said first charging condenser and of said first storage condenser 'for charging said first storage condenser, a second unilaterally conducting device connected between said source of reference potential and the other terminal of said first charging condenser for discharging said first charging condenser after the occurrence of each of said pulses, a third unilaterally conducting device connected between the other terminals of said second storage condenser and said second charging condenser for charging said second stor-- age condenser, a fourth unilaterally conducting device connected between the other terminals of said first storage condenser and said second charging condenser for discharging said first storage condenser and said second charging condenser after the occurrence of each of said pulses, and means for discharging said second storage condenser when it has been charged to a predetermined voltage level with respect to said ref-- erence potential.

5. An electric counter c rcuit comprising a first and a second charging condenser, a first and a second storage condenser, the capacitance of said first charging condenser divided by the capacitance of said first storage condenser being substantially equal to the capacitance of said second charging condenser divided by the capacitance of said second storage condenser, the capacitance of said first storage condenser beng large compared to the capacitance of said second charging con denser, a source for developing spaced pulses of predetermined amplitude connected between another source of fixed reference potential and one terminal of each of said charging condensers, one terminal of each of said storage condensers being connected to said source of reference po tential, a first unilaterally conducting device connected between the other terminals of said first charging condenser and of said first storage condenser for charging said first storage condenser during the occurrence of each of said pulses, a second uniaterally conducting device connected; between said source of reference potential and the other terminal of said first charging con-v denser for discharging said first charging con-' denser after the occurrence of each of said pulses, a th rd unilaterally conducting device connected between the other terminals of said second storage condenser and said second charging condenser for chargingsaid second storage con-' denser during the occurrence of each of said pulses, a fourth unilaterally conducting device connected between the' other terminals of said first storage condenser and said second chargingv condenser for dischargingsaid first storage con-f denser and said second charging condenser afterl the occurrence of each of sa d pulses, thereby to equalize substantially the voltage increments ap'- plied successively to said second storage condenser, and means for discharging said second storage condenser when it has been charged to a? predetermined voltage level with respect to said reference potential.

6. An electric counter circuit comprising a first charging condenser, a source of fixed reference potential, a first diode having its cathode con nected to said first charging condenser and its anode connected to said fixed reference potential; a source of second diode having its anode connected to the junction point of said first charging condenser and said first diode, a source for developing spaced pulses of predetermined am plitude having a first terminal connected to source of reference potenti al and a second terminal connected to said first charging condenser afirst storage condenser connected between the cathode of said second diode and said source of reference potential, pair of diodes connected in series to the cathode of said second diode to provide a unilateral conducting path, one electrode of one diode of each of said pairs of diodes being an output'electrode, a plurality of further char ing condensers each being connected between said source of pulses and the junction point be- V charging condenser, a source of fixed reference potential, 3, first high-vacuum diode having its cathode connected to said first charging condenser and its anode connected to said source of fixed reference potential, a second high-vacuum diode having its anode connected to the junction point'of said first charging condenser and said first diode, a source for developing spaced pulses of predetermined amplitude having a first termirial connected to said source of reference potential anda second terminal connectedtosaid first charging condenser, a first storage condenser connected between the cathode of said second diode and said source of referencepotential, pairs of high-vacuum diodes connected in series to the cathode of said second diode to provide a unilateral conducting path, the cathode of one diode of each of said pairs of diodes being an output electrode, a plurality of further charging condensers each being connected between said source of pulses and the junction point between a difierent one of said pairs of diodes, a plurality of further storage condensers each being connected between said source of reference potential and the output cathode of a difierent one of said pairs of diodes, the capacitance of the penultimate on of said storage condensers being large compared to the capacitance of the last one of said charging condensers, the capacitance of said first charging condenser divided by the capacitance of said first storage condenser being substantiall equal to the capacitance of on of said further charging condensers divided by the capacitance of its associated storage condensers connected to be charged thereby, thereby to apply substantially equal voltage increments during successive pulses to the last one of said storage condensers, and means for discharging the lastone of said storage COD: densers when it has reached a predetermined potential with respect to said reference potential.

8. An electric counter comprising an electric charging element, a first electric storage element, means for developing spaced pulses, means for applying said pulses to said elements for charging them in series substantially simultaneously with the occurrence of each of said pulses, a circuit coupled to said charging element, a second electric storage element connected in series in said circuit, means for applying said pulses to said circuit for developing progressively increasing potentials across said second storage element, unilaterally conducting means coupled to said second storage element and to said charging element for charging said charging element between successive pulses to a polarity opposite to that to which'it is charged by said pulses, and means for discharging said first storage element when it has reached a predetermined potential.

9. An electric counter comprising a charging condenser, a storage condenser, means for developing spaced pulses, means for applying said pulses to said condensers for charging them in series substantiall during the occurrence of each of said pulses, a circuit, an electric storage element arranged inseries in said circuit, said circuit being coupledto said charging condenser, means for applying said pulses to said element to develop potentials of successively increasing magnitude thereacross, means consisting of a unilaterally conducting device coupled to said element and to said charging condenser for chargQ ing said charging condenser between successive pulses to a polarity opposite to that to which it is charged by said pulses, and means for discharging said storage condenser when it has bee charged to a predetermined potential.

10. An electric counter circuit comprising a source of fixed reference potential, a source fordeveloping spaced pulses, said pulse source having a first terminal connected to said source of reference potential and a second terminal, two pair of diodes connected in series to form a unilateral conducting path, one electrode of one diode of each 'of'said pairs of diodes beinglan output electrode, the first one of said diodes being connected with its anode to the first terminal of said source of pulses, two charging capacitance elements, each being connected between'the sec ond terminal of said source of pulses and the junction point between a difierent pair of said diodes; two storage capacitance elements each being connected between said source of reference potential and the output electrode of a different pair of said diodes, and means for dis"- charging the last one of said storage capacitance elements when it has reached a predetermined voltage with respect to said reference potential.

11. An electric counter circuit comprisingf a source of fixed reference potential, a source for developing spaced pulses of predetermined amplitude, said pulse source having a first terminal connected to said source of reference potential and a second terminal, two pairs of diodes con; nected in series to form a unilateral conducting path, one electrode of one diode of each of said pairs of diodes being an output electrode, the first one of said diodes being connected with its anode to the first terminal of said source of pulses, .a first charging condenser connected between the second terminal of said source of pulses and the junction point between one pair of said diodes, a second charging condenser connected between the second terminal of said source of pulses and the junction point between the other pair of said diodes, a first and a second storage condenser each being" connected between said fsourceof ref: erence potential and the output electrode'ofia' said first charging condenser divided between ca-i pacitance of said first storage condenser being substantially equal to the capacitance of said second charging condenser'divided. by the ca-g, pacitance of said second storage condenser,.ltlie capacitance of said first storage condenserb'eiiig large compared to the capacitance of said second,

13 denser when it has reached a predetermined voltage with respect to said reference potential,

12. An electric counter circuit comprising a source of fixed reference potential, a source for developing spaced pulses, said pulse source having a first terminal connected to said source of reference potential and a second terminal, pairs of unilaterally conducting devices connected in series, one electrode of one unilaterally conducting device of each of said pairs of unilaterally conducting devices being an output electrode, the first one of said devices being connected to the first terminal of said source of pulses, charging capacitance elements each being connected between the second terminal of said source of pulses and the junction point between a different pair of said devices, storage capacitance elements each being connected between said source of reference potential and the output electrode of a different pairs of said devices, and means for discharging the last one of said storage capacitance elements when it has reached a predetermined voltage with respect to said reference potential.

13. An electric counter circuit comprising a source of fixed reference potential, a source for developing spaced pulses of predetermined amplitude, said pulse source having a first terminal connected to said source of reference potential and a second terminal, pairs of diodes connected in series to form a unilateral conducting path, one electrode of one diode of each of said pairs of diodes being an output electrode, the first one of said diodes being connected with its anode to the first terminal of said source of pulses, charging condensers each being connected between the second terminal of said source of pulses and the junction point between a different pair of said diodes, storage condensers each being connected between said source of reference potentia1 and the output electrode of a different pair of said diodes, and means for discharging the last one of said storage condensers when it has reached a predetermined voltage with respect to said reference potential.

14. An electric counter circuit comprising a source of fixed reference otential, a source for developing spaced pulses of predetermined amplitude, said pulses source having a first terminal connected t said source of reference potential and a second terminal, pairs of diodes connected in series to form a unilateral conducting path, one electrode of one diode of each of said pairs of diodes being an output electrode, the first one of said diodes being connected with its anode to the first terminal of said source of pulses, charging condensers each being connected between the second terminal of said source of pulses and the junction point between a different pair of said diodes, storage condensers each being connected between said source of reference potential and the output electrode of a different pair of said diodes, the capacitance of the penultimate one of said storage condensers being large compared to the capacitance of the last one of said charging condensers, the capacitance of one of said charging condensers divided between capacitance of it associated storage condenser connected to be charged thereby being substantially equal to the capacitance of another one of said charging condensers divided by the capacitance of its associated storage condenser connected to be charged thereby, thereby to apply substantially equal voltage increments during successive pulses to the last one of said storage condensers, and means for discharging the last one of said storage condensers when it has reached a predetermined voltage with respect to said reference potential.

ALBERT S. HARRIS.

REFERENCES CITED The following references are of record in the file of this patent:

UNITED STATES PATENTS Number Name Date 2,420,516 Bischoif May 13, 1942 2,403,557 Sanders July 9, 1946 

